High-k gate dielectrics for two- dimensional multilayer hafnium disulfide based interdigitated electrodes-field-effect transistors : next-generation technology (PhD)

Abstract

Scaling of silicon-based Complementary Metal-Oxide-Semiconductor (CMOS) transistors, following the celebrate Moore’s law has been assisted, the unprecedented growth of the semiconductor industry from the past six decades. Concurrently, the device scaling has been extended, down to nano-scale regime to meet the ever-rising market demands of high performance and functionality of low-cost electronics. Thereby, the scaling trend of MetalOxide-Semiconductor Field-Effect Transistors (MOSFETs) dimension and isolation length nearly approached, to the depletion widths and engenders to the Short Channel Effects (SCE), where the gate loses control over the channel, also drain starts to compete with the gate electrode. By the same token, International Technology Roadmap for Semiconductors (ITRS 2.0, 2015) and Semiconductor Industry Association (SIA) members including Intel, AMD, IBM, and many other industry heavyweights emphasized that silicon technology may not be shrink beyond 2021. That’s why there is an urgent need for a breakthrough transition towards all-new device architecture and channel as well as compatible dielectric materials. Recent years, there is extensive attention toward Two Dimensional (2D) materials for 2D-Field-Effect Transistors (2D-FETs) applications; including graphene, hexagonal boron nitride (h-BN), germanene (2D germanium), silicene (2D silicon) and MXenes, etc. as a possible semiconducting and channel materials for next-generation technology node. In particular, one of the predominant appealing TMDs is Hafnium Disulfide (HfS2) due to the unique physical, chemical, electrical, optical, and mechanical properties; especially for electronics perspective: the desirable bandgap of ~1.2 eV and the theoretical mobility of ~1833 cm2/Vs. It renders, its promising contention towards an active channel material for next generation (NG), FET applications. Moreover, to continue the ICs scaling trend, one of the main challenges for the practicality of devices is the availability of compatible gate dielectric materials. The most by and large representatives of dielectrics are high-ĸ, including aluminium oxide (Al2O3), Yttrium oxide (Y2O3), Scandium oxide (Sc2O3), titanium dioxide (TiO2), Lanthanum oxide (La2O3), Tantalum pentoxide (Ta2O5) and many more. Therefore, the reliable performance of 2D based Metal Insulator Semiconductor Field-Effect Transistors (MISFETs), a suitable gate dielectric with considerable thermodynamically stability, wider bandgap (> 5 eV) and low interface traps density (< 1012 traps/cm2) is necessary. Since most of the dielectrics suffer from the inherent critical issues viz. lower bandgap, compatibility with 2D materials, thermodynamically, environmentally instability, etc. There is a class of high-ĸ oxides of Hafnium and Zirconium, which showed the most felicitous candidature to serve as the gate dielectric with the considerable bandgap (> 6 eV), dielectric constant (>10) and optimal thermodynamic stability with 2D-TMDs. Considering the aforementioned merits and material engineering synergies; the device performance of 2D multilayer (2DML) of Hafnium Disulfide (HfS2), as a channel material (2DML HfS2) and compatible high-κ gate dielectrics; HfO2, ZrO2 and HfZrO2 along with micro Interdigitated Electrodes (µ-IDEs) based “Source” and “Drain” architecture for µ-IDEs-FETs applications are methodically investigated in the present work. In the present work, a high purity 2DML HfS2 is chemically synthesized through the Hot injection method to utilize as a channel material for the µ-IDEs-FETs applications. The optimal quality of the HfS2 is verified from the crystal structure, chemical composition, and surface morphology investigations of the HfS2 thin films/flakes through Raman Spectroscopy, X-Ray Diffraction (XRD), X-Ray Photoelectron Spectroscopy (XPS) and the Atomic Force Microscopy (AFM), etc. techniques. Further, asymmetric Aluminium-micro Interdigitated electrodes (µIDEs) are fabricated onto the SiO2/Si substrate to serve as the “Source” and “Drain”. Thereafter, HfS2 formulation spin-coated onto µ-IDEs and followed by the high-ĸ gate dielectrics (HfO2, ZrO2 and HfZrO2) thin films depositions to fabricate the various sets of device structures: Al/HfO2/HfS2/Alμ-IDEs, Al/ZrO2/HfS2/Alμ-IDEs and Al/HfZrO2/HfS2/Alμ-IDEs. The fabricated µIDEs-FETs structures are electrically investigated and accomplished that with variation in the dielectric constant of the gate dielectrics: ĸHfZrO2 > ĸZrO2 > ĸHfO2, the performance of the µ-IDEsFETs are also significantly improved. As well as it is noticed that Al/HfZrO2/HfS2/Alμ-IDEs structures show better performance with respect to contenders which might be due to the negative capacitance (NC) behavior of HfZrO2. This study evidently sheds the light on the potential candidature of investigated structures for next-generation logic applications.